ENGR-434 VLSI Design (2019)
Announcements & Notes
(most recent first)
Homework #10_______________Due___5/22/19
Homework #9_______________Due___5/20/19
Homework #8_______________Due___5/13/19
Homework #7_______________Due___5/06/19
Homework #6_______________Due___5/01/19
Homework #5_______________Due___4/24/19
Homework #4_______________Due___4/22/19
Homework #3_______________Due___4/17/19
Homework #2_______________Due___4/10/19
Homework #1_______________Due___4/08/19
Class Schedule
Slides
Laboratory materials
wwu tutorial: transistor level design
wwu tutorial: creating a component symbol
wwu tutorial: transistor level design
wwu tutorial: intro to layout
Full custom tutorial
Tutorial by VCU (link)
File names
Parasitic extraction
Eldo simulation notes (pdf)
How to copy Mentor design files (pdf)
Adding a border to a schematic (pdf)
Full Custom design process (pdf)
Notes re simulation (pdf)
Example test vector file
Documentation on using tvinclude
Documentation on some tvinclude parameters
doclink - A documentation setup script
How to use the doclink script
IC related news
7nm finfet technology challenges (pdf)
Intels new FinFET 3D transistors (link)
20nm Flash Memory (link)
Sophia Wilson, short promo (link)
Steve Furber (link)
Documentation and reference material
History of SPICE (pdf)
Semiconductor & IC History (link)
Historical ICs - photos etc. (link)
AMI 0.5 technology parameters per MOSIS (pdf)
MOSIS design rules for scalable CMOS (pdf)
MOSIS web page for scaleable CMOS
Larry Aamodt
PhD, PE
Professor of Engineering and Computer Science
E.F. Cross School of Engineering
Walla Walla University
Contact:
via email: AamoLa (at) wallawalla.edu
via phone: x2058
This page is subject to change