CMSIS-Core (Cortex-M)  Version 5.1.1
CMSIS-Core support for Cortex-M processor-based devices
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NVIC Functions

Nested Vector Interrupt Controller (NVIC) functions related to TrustZone for Armv8-M. More...

Functions

void TZ_NVIC_SetPriorityGrouping_NS (uint32_t PriorityGroup)
 Set Priority Grouping (non-secure) More...
 
uint32_t TZ_NVIC_GetPriorityGrouping_NS (void)
 Get Priority Grouping (non-secure) More...
 
void TZ_NVIC_EnableIRQ_NS (IRQn_Type IRQn)
 Enable External Interrupt (non-secure) More...
 
uint32_t TZ_NVIC_GetEnableIRQ_NS (IRQn_Type IRQn)
 Get Interrupt Enable status (non-secure) More...
 
void TZ_NVIC_DisableIRQ_NS (IRQn_Type IRQn)
 Disable External Interrupt (non-secure) More...
 
uint32_t TZ_NVIC_GetPendingIRQ_NS (IRQn_Type IRQn)
 Get Pending Interrupt (non-secure) More...
 
void TZ_NVIC_SetPendingIRQ_NS (IRQn_Type IRQn)
 Set Pending Interrupt (non-secure) More...
 
void TZ_NVIC_ClearPendingIRQ_NS (IRQn_Type IRQn)
 Clear Pending Interrupt (non-secure) More...
 
uint32_t TZ_NVIC_GetActive_NS (IRQn_Type IRQn)
 Get Active Interrupt (non-secure) More...
 
void TZ_NVIC_SetPriority_NS (IRQn_Type IRQn, uint32_t priority)
 Set Interrupt Priority (non-secure) More...
 
uint32_t TZ_NVIC_GetPriority_NS (IRQn_Type IRQn)
 Get Interrupt Priority (non-secure) More...
 

Description

Function Documentation

void TZ_NVIC_ClearPendingIRQ_NS ( IRQn_Type  IRQn)

Clears the pending bit of an non-secure external interrupt when in secure state.

Parameters
[in]IRQnExternal interrupt number. Value cannot be negative.
See Also
void TZ_NVIC_DisableIRQ_NS ( IRQn_Type  IRQn)

Disables a device-specific interrupt in the non-secure NVIC when in secure state.

Parameters
[in]IRQnExternal interrupt number. Value cannot be negative.
See Also
void TZ_NVIC_EnableIRQ_NS ( IRQn_Type  IRQn)

Enables a device-specific interrupt in the non-secure NVIC when in secure state.

Parameters
[in]IRQnExternal interrupt number. Value cannot be negative.
See Also
uint32_t TZ_NVIC_GetActive_NS ( IRQn_Type  IRQn)

Reads the active register in non-secure NVIC when in secure state and returns the active bit.

Parameters
[in]IRQnInterrupt number.
Returns
0 Interrupt status is not active.
1 Interrupt status is active.
See Also
uint32_t TZ_NVIC_GetEnableIRQ_NS ( IRQn_Type  IRQn)

Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state.

Parameters
[in]IRQnInterrupt number.
Returns
0 Interrupt is not enabled.
1 Interrupt is enabled.
See Also
uint32_t TZ_NVIC_GetPendingIRQ_NS ( IRQn_Type  IRQn)

Reads the pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified interrupt.

Parameters
[in]IRQnInterrupt number.
Returns
0 Interrupt status is not pending.
1 Interrupt status is pending.
See Also
uint32_t TZ_NVIC_GetPriority_NS ( IRQn_Type  IRQn)

Reads the priority of an non-secure interrupt when in secure state. The interrupt number can be positive to specify an external (device specific) interrupt, or negative to specify an internal (core) interrupt.

Parameters
[in]IRQnInterrupt number.
Returns
Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller.
See Also
uint32_t TZ_NVIC_GetPriorityGrouping_NS ( void  )

Reads the priority grouping field from the non-secure NVIC when in secure state.

Returns
Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
Note
Only available for Armv8-M Mainline.
See Also
void TZ_NVIC_SetPendingIRQ_NS ( IRQn_Type  IRQn)

Sets the pending bit of an non-secure external interrupt when in secure state.

Parameters
[in]IRQnInterrupt number. Value cannot be negative.
See Also
void TZ_NVIC_SetPriority_NS ( IRQn_Type  IRQn,
uint32_t  priority 
)

Sets the priority of an non-secure interrupt when in secure state.

Note
The priority cannot be set for every core interrupt.
Parameters
[in]IRQnInterrupt number.
[in]priorityPriority to set.
See Also
void TZ_NVIC_SetPriorityGrouping_NS ( uint32_t  PriorityGroup)

Sets the non-secure priority grouping field when in secure state using the required unlock sequence. The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. Only values from 0..7 are used. In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.

Parameters
[in]PriorityGroupPriority grouping field.
Note
Only available for Armv8-M Mainline.
See Also